1. Field of the Invention
The present invention relates to a circuit layout and a semiconductor chip for a photosensitive chip. More particularly, the present invention relates to a circuit layout and a semiconductor substrate for a photosensitive chip that can reduce signal interference.
2. Description of Related Art
The rapid progress in electronic communication has brought about an explosion in the transmission of information. Portable electronic devices can be conveniently used to transmit data at an inexpensive and efficient way. To capture an image, for example, an image-capturing device is used. Most image-capturing devices utilize a photosensitive chip to capture image data and then convert the captured analogue image data into digital data signals with an analogue/digital converter. Thereafter, the digital image data signals can be archived, transmitted or further processed. In general, each image sensor has a plurality of photosensitive units and the output voltage from each photosensitive unit changes in proportional to the illumination level. For example, an increase in the intensity of illumination will lead to a drop in the output voltage from a photosensitive unit.
FIG. 1 is an equivalent circuit diagram of a photosensitive unit within a conventional photosensitive chip. As shown in FIG. 1, the photosensitive unit 20 comprises a photo-diode 21 and a plurality of transistors 23, 24 and 25. A power terminal 26 is electrically connected to the drain of the transistors 23 and 24. The source of the transistor 23, the cathode of the photo-diode 21 and the gate of the transistor 24 are electrically connected together. The anode of the photo-diode 21 is electrically connected to a ground terminal 27. The source of the transistor 24 and the drain of the transistor 25 are electrically connected and the signal produced by the photosensitive unit 21 is output from the source of the transistor 25.
The photosensitive chip comprises a semiconductor substrate and a plurality of circuit layers as shown in FIGS. 2 through 5. FIG. 2 is a top view showing N-doped regions above a P-type substrate of a conventional photosensitive unit. FIG. 3 is a top view showing N-doped regions and polysilicon circuit layers above a P-type substrate of a conventional photosensitive unit. FIG. 4 is a top view showing N-doped regions and a metallic circuit layers above a P-type substrate of a conventional photosensitive unit. FIG. 5 is a top view showing N-doped regions and another metallic circuit layers above a P-type substrate of a conventional photosensitive unit.
As shown in FIG. 2, the semiconductor substrate 110 has a P-type substrate 120, and a plurality of N-doped regions 131, 132, 133, 134 and a matrix of photosensitive units 112 are formed on a surface of the semiconductor substrate 110. Each photosensitive unit 112 has a photosensitive region 114. The aforementioned photo-diode 21 is formed within the photosensitive region 114. In general, the photo-diode 21 operates with a reverse biased p-n junction. When photons bombard the photo-diode 21, the electron-hole pairs inside the depletion region will separate from each other and hence an electric current will flow from the N-doped region 131 within the photosensitive region 114 to the P-type substrate 120 and finally will flow to the ground terminal 27.
As shown in FIG. 3, the hatched areas indicate the locations of polysilicon circuit lines 141, 142 and 143. The line 141 crosses over neighboring N-doped regions 131 and 132; the line 142 crosses over neighboring N-doped regions 132 and 133; and the line 143 crosses over neighboring N-doped regions 133 and 134. The N-doped regions 131, 132, 133, 134 on each side of the polysilicon circuit lines 141, 142 and 143 form the source or the drain of MOS transistors 151, 152 and 153. The polysilicon circuit lines 141, 142, 143 serve as the gates of the MOS transistors 151, 152, 153. In FIG. 3, the transistor 151 on the semiconductor substrate 110 corresponds in position to the transistor 23 shown in FIG. 1. The transistor 152 on the semiconductor substrate 110 corresponds in position to the transistor 24 shown in FIG. 1. The transistor 153 on the semiconductor substrate 110 corresponds in position to the transistor 25 shown in FIG. 1. The source of the transistor 151 and the N-doped region 131 within the photosensitive region 114 are electrically connected. The drain of the transistor 151 and the drain of the transistor 152 are electrically connected through the N-doped region 132. The source of the transistor 152 and the drain of the transistor 153 are electrically connected through the N-doped region 133. The source of the transistor 153 and a signal output terminal 160 are electrically connected through the N-doped region 134.
As shown in FIG. 4, the areas with slash lines represent the metallic circuits 171 and 172 above the polysilicon circuits. The N-doped region 131 within the photosensitive region 114 and the gate of the transistor 152 are electrically connected through the conductive plugs 181, 182 and the metallic circuit 171. The metallic circuit 172 and the gate of the transistor 151 are electrically connected through the conductive plugs 183.
As shown in FIG. 5, the hatched areas represent the metallic circuits 191 above the polysilicon circuits. The metallic circuits 191 and the N-doped region 132 are electrically connected through the conductive plugs 184, wherein the metallic circuits 191 are connected to a power terminal 26.
In the above layout of the photosensitive chip, the N-doped regions 132, 133, 134 are positioned between the photosensitive regions 114 of neighboring photosensitive units 112. When the photosensitive regions 114 are illuminated, photons will bombard the photo-diode 21 and separate the electron-hole pairs within the depletion region at the junction between the N-doped region 131 and the P-type substrate 120. The free electrons will move in a random direction. Some of the free electrons drifting to the left or to the right are absorbed by the N-doped regions 132, 133, 134 and thereby interference with the determination of light intensity by neighboring photosensitive units 112 can be reduced.
However, the aforementioned type of circuit layout on the photosensitive chip has no barrier between neighboring upper and lower photosensitive regions 114 for preventing free electrons from drifting up or down to the N-doped regions 131 within neighboring upper and lower photosensitive regions 114. The light intensity level determined by the photosensitive units 112 will be affected by the interference from upper or lower ones. When an interference from the neighboring photosensitive units 112 occurs, the contrast at the border of a picture will be fuzzy and the degree of coloration of colors will drop as well. Furthermore, with the reduction of pixel dimension, the capacitance of the photo-diode 21 will decrease. Consequently, the photo-diode 21 is increasingly subjected to the interference of noise signals.